Digital-to-analog converters are used to convert a digital input signal to an analog output signal. The simplest technique used to build a voltage scaling digital-to-analog converter (DAC) uses a series of resistors (a "resistor string") connected between two supply voltages to serve as a multi-step voltage divider. Such a resistor string DAC is illustrated in FIG. 1. Switches (analog multiplexer) controlled by the digital input signal then select a node between two resistors of the resistor string to serve as the analog voltage output signal. Such a resistor string DAC that uses an N-bit digital input requires 2.sup.N equal resistors and 2.sup.N switches.
More particularly, FIG. 1 illustrates a prior art DAC 10 for a 3-bit digital input. A resistor string has eight resistors R0 through R7 connected in series. One end of the string is connected to a low reference voltage V.sub.REFN (usually ground), and the other end is connected to a high reference voltage V.sub.REFP (supply). The resistor string acts as a voltage divider to provide intermediate voltages ranging from V.sub.REFN to V.sub.REFP at nodes between the resistors. A 3-bit digital input signal or "code" represents one of eight discrete values or "states". This 3-bit input is decoded in a decoder (not shown) that is used to activate one of the switches S0 through S7, thereby selecting a voltage to provide an analog output V.sub.OUT. These switches S0 through S7 are typically CMOS transistor switches.
The advantages of this design include simplicity, low cost and its inherent monotonicity. A DAC is said to be monotonic if, for increasing input values, the device yields strictly increasing output values. In other words, whatever resistor matching is achieved in the fabrication process for this design and whatever is the targeted resolution, the transfer characteristics of the DAC are ensured to be strictly monotonic. The resolution of a device refers to the number of bits in the input code and determines the smallest change possible in the output analog signal for a DAC. A DAC with more bits in its input code will have a higher resolution. For example, an N-bit code will have 2.sup.N quantization levels and 2.sup.N-1 steps between levels. Even a poor matching of resistors on a given chip, the resolution will not be greatly affected. By "matching" it is meant that the resistors are preferably of the same resistance value but, due to manufacturing variations, may have values that vary as much as 20% or more.
Even with very poor matching of the resistors, the DAC will still achieve a small Differential Linearity Error (DLE). For example, even with a 20% mismatching of resistance values, the DAC still yields a 0.2 least significant bit (LSB) DLE as a worst case. Linearity is a measure of accuracy, and the DLE measures the linearity between code transitions and is a measure of monotonicity. However, a monotonic device does not necessarily have to be linear. In the DAC of FIG. 1, the impedance of the CMOS switches does not affect the linearity of the DAC. A drawback of the DAC of FIG. 1 is that the for increased resolution the hardware requirement (number of resistors and switches) grows exponentially, which leads to increased costs and increased space requirements.
In most mixed-signal products, i.e. products which integrate on the same silicon die very complex digital circuitry next to the analog cells needed for the application (for example audio and radio interfaces for telecommunication products) for the purpose of reducing system costs by avoiding the need for separate digital and analog chips, differential voltage signaling is mandatory on the analog circuitry in order to reduce the coupling effects from the switchings on the digital part. While in single-ended circuitry a signal is referred to a ground reference that is usually the negative power supply of the application, in differential circuitry a signal is defined as the difference between two symmetrical nodes (i.e. two outputs of opposite polarity, and the output signal will be the voltage difference between these two outputs). As mentioned, differential voltage signaling is mandatory with mixed-signal products for reducing the negative capacitive and inductive coupling effects between digital and analog signals which are mutually physically closely arranged. This is particularly true in the case of a "single-tub" process, where analog and digital parts have to share a common bulk.
A common solution for converting the resistor string DAC of FIG. 1 from single-ended voltage signaling to differential voltage signaling includes providing two analog multiplexers with complementary select control in order to provide a differential voltage output V.sub.OUTP /V.sub.OUTN. Such an implementation requires 2.sup.N equal resistors and on the order of 2.sup.N switches for the each of the multiplexers for an N-bit resolution. FIG. 2 shows a differential 3-bit resistor string DAC 20 offering this type of solution, including eight resistors R0 through R7 connected in series, with one end of the string connected to a low reference voltage V.sub.REFN (usually ground), and the other end connected to a high reference voltage V.sub.REFP (supply). A first multiplexer 22 includes switches (typically CMOS transistor switches) S-3p through S3p and a second multiplexer 24 includes switches (typically CMOS transistor switches) S-3n through S3n. A 3-bit digital input signal or "code" represents one of eight discrete values or "states". This 3-bit input is decoded in a decoder (not shown) that is used to simultaneously activate one of the switches of each one of the multiplexers 22 and 24, thereby to select a voltage on each side of the resistor string to provide an analog differential voltage output defined by V.sub.OUTP and V.sub.OUTN.
In order to reduce the number of components and corresponding size requirements of an N-bit differential resistor string DAC of the type of FIG. 2, it is possible to replace each of the two N bit multiplexers (i.e. each with on the order of 2.sup.N switches) with an N-1 bit multiplexer (i.e. with on the order of 2.sup.N-1 switches), and to add a switching matrix which receives as input the two multiplexer outputs. The two N-1 bit multiplexers may be simultaneously controlled by the decoded N-1 least significant bits (LSBs) of the digital input code (d[N-2:0]), while the input matrix may be controlled by the most significant bit (MSB) of the digital input code (d[N-1]), thereby corresponding to a sign and amplitude code. The sign and amplitude code for the case of a 3-bit signal, in which the sign is determined by the 1st bit (MSB) and the amplitude is determined by all other bits (N-1 LSBs), is thus: -3:111; -2:110; -1:101; 0:100=000; +1:001; +2:010; +3:011. With such a modification, the number of required switches is advantageously divided by (on the order of) two, such that an N-bit resolution for the differential voltage output only requires on the order of 2.sup.N switches and 2.sup.N resistors.
FIG. 3 shows an improved differential 3-bit resistor string DAC 30 of this type, including eight resistors R0 through R7 connected in series, with one end of the string connected to a low reference voltage V.sub.REFN (usually ground), and the other end connected to a high reference voltage V.sub.REFP (supply). A first 3-bit multiplexer 32 includes switches (typically CMOS transistor switches) S0p through S3p and a second 3-bit multiplexer 34 includes switches (typically CMOS transistor switches) S0n through S3n. The outputs of the multiplexers 32 and 34 are connected as input to a switching matrix 36. A 3-bit digital input signal or "code" represents one of eight discrete values or "states". This 315 bit input is decoded in a decoder (not shown), and the 2 least significant bits (LSBs) of the digital input code (d[1:0]) simultaneously control the first and second multiplexers 32 and 34 to simultaneously select a respective voltage at each one of the multiplexers 32 and 34. The two least significant bits of the digital input code provide four discrete values or states which select the four switch combinations including: S0n and S0p; S1n and S1p; S2n and S2p; and S3n and S3p. The selected voltages from each of the multiplexers 32 and 34 are input into switching matrix 36, which is controlled by the most significant bit (MSB) of the digital input code (d[2]) to provide an analog differential voltage output V.sub.OUTP -V.sub.OUTN ranging in relative value between -3, -2, -1, 0, +1, +2, and +3 (seven voltage values).
While the differential voltage DAC 30 of FIG. 3 indeed reduces the component requirements with respect to the differential voltage DAC 20 of FIG. 2, it would still be desirable to even further reduce the component requirements in differential voltage digital-to-analog converters.